1. Field of the Invention
The present invention relates to a pulse width modulator and a non-transitory computer readable medium for storing a program for the pulse width modulator. In particular, the present invention relates to a pulse width modulator including a ΔΣ modulator and configured to convert an m value (m: an integer of three or more) digital signal into a binary pulse width modulation signal to output the binary pulse width modulation signal, and relates to a program for such a pulse width modulator.
2. Description of the Related Art
A pulse width modulator has been sometimes used, which includes a ΔΣ modulator configured to output an n-bit digital audio signal in order to convert a multibit digital audio signal such as a pulse code modulation (PCM) audio signal into a pulse width modulation (PWM) signal of two or more values.
The ΔΣ modulator is provided with a quantizer in a feedback loop of a loop filter, and power spectrum density distribution of quantized noise sampled at high speed is shaped. Thus, a dynamic range of a passband is improved. As a result, an m value digital signal can be encoded into an n value digital signal whose quantization word length is shorter than that of the m value digital signal. With noise shaping operation as described above and a sampling frequency set at sufficiently-high, there is an advantage that the output signal of the ΔΣ modulator has a wide dynamic range with a small quantization value number.
Since the output signal of the ΔΣ modulator needs to have a sampling frequency much higher than an audio signal band to be reproduced, there is an advantage that a binary pulse width modulation signal converted from the output signal of the ΔΣ modulator is more easily handled. Thus, the pulse width modulator including the ΔΣ modulator has been sometimes used for a switching amplifier called a “digital amplifier” in a typical case.
For example, a delta-sigma modulator including a loop filter and a comparator has been typically employed (see Japanese Patent No. 4116005). In such a delta-sigma modulator, a pulse width control circuit configured to control a minimum pulse width of a signal quantized by the comparator is provided on a loop of the delta-sigma modulator, and the pulse width control circuit controls the minimum pulse width depending on a value of an input signal of the delta-sigma modulator or a value of a signal containing a component of the input signal. Moreover, another ΔΣ modulator has been typically employed (see U.S. Pat. No. 6,373,334, U.S. Pat. No. 7,714,675). In such a ΔΣ modulator, a residual error between an ideal output and an actual output in the ΔΣ modulator is fed back in order to reduce noise and distortion in a switching amplifier.
Moreover, the pulse width modulator including the ΔΣ modulator is suitable for performing digital signal processing for a multibit digital audio signal in a computing circuit such as a central processing unit (CPU) or a digital signal processor (DSP) to output the resultant signal. Note that in order to realize such a configuration by the digital signal processing, there is a problem different from that in the case of use for the switching amplifier. When an m value multibit digital audio signal is converted into a binary pulse width modulation signal by ΔΣ modulation, if an attempt is made to increase the length of the pulse width modulation signal according to a large n value, the number of computing increases in proportion to an increased pulse width, leading to impractical implementation. Since a ΔΣ modulation signal sampling frequency is significantly high, an amount of time per sample is shortened, and an increase in the number of computing leads to impractical implementation of signal processing.